Mixed signal design engineer


Take ownership of the digital specification and hardware-software interfaces definition for mixed-signal System-on-Chips
Make the bridge between competence centers delivering part of the SoC (Digital design, Analog design, Software design, etc.)
Work with circuit design engineers and system architects to define verification needs and create verification plans
Perform detailed simulation and verification of top level analog, digital and embedded software functionality
Be involved in the system modeling to conceptualize and validate circuits
Develop and/or integrate high-level functional models and test benches to support system simulation
Develop and/or integrate Verilog-AMS and System Verilog behavioral models
Support design and production teams


You have an engineering master degree in an electronic or microelectronic field and you have 2+ years of relevant experience as a designer in a microelectronics environment, in combination with good system verification capabilities
You have experience with the latest verification languages like System Verilog or Verilog-AMS and with scripting languages like Python, TCL, SHELL
Experience with behavioral modeling languages (Verilog, Verilog-A, Verilog-AMS, System Verilog) is an asset, as well as work experience with Cadence AMS Designer verification flow
You have experience in the UVM verification methodology
Knowledge of Functional Safety industrial standards such as ISO26262 and IEC61508 is a plus
Knowledge of automotive bus interfaces SENT/SPC, PSI5 is a plus

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